This invention relates to semiconductor devices, and, more particularly, to trench capacitors with buried isolation layer and methods of forming those trench capacitors.
For integrated circuit (“IC”) devices, memory cells are among one of the most important components, either as accompanying components in ICs or as stand-alone devices. In the past two decades, continued researches have been underway to further increase storage capacity per unit area of ICs, improve data retaining time, improve writing and reading speed, and reduce power consumption of memory cells.
Among the various design of memory cells, one major design relies on capacitors as charge storage devices to store data by the charged status of the capacitors. For example, a single dynamic random access memory (DRAM) or synchronous DRAM (SDRAM) cell generally may include a capacitor and a transistor. In some designs, the capacitor may be a single charge storage device for storing one of two or more logical status. The transistor controls the writing and reading of the logical status stored in the capacitor. Depending on the device design and manufacturing process, the transistor may be a field-effect transistor (FET), and frequently, an N-channel field effect transistor (N-FET). To further illustrate the background of the related art without limiting the scope of the invention, the following describes certain examples and memory cell design.
Generally, a capacitor-type memory cell may be one of the three designs: planar, stacked-capacitor, and trench. For a planar design, the transistor and capacitor of a memory cell are provided as planar components. Such design generally requires more area per memory cell than the other two designs, because the planar capacitor and transistor usually occupy separate areas on a semiconductor substrate. In the stacked-capacitor design, the capacitor and transistor of a memory cell are “stacked” up to reduce the substrate area occupied by each cell. In the trench design, the capacitor, the transistor, or both of them in a memory cell may be placed in a substrate, usually by forming the part of cell or the entire cell in a trench or a recessed area of the substrate. Due to such design, trench design approach allows the memory cells to be formed without occupying too much substrate area and allows the formation of other devices or circuitry, such as circuitry for controlling the memory operation, above the memory cells.
Although trench design may provide a higher density of memory, the increasing density of trench devices also leads to significant leakage concerns. Accordingly, there are needs for trench capacitor design having reduced leakage and for methods of manufacturing trench capacitors having reduced leakage.